iDocChip: A Configurable Hardware Architecture for Historical Document Image Processing
نویسندگان
چکیده
منابع مشابه
FPGA-Based Configurable Systolic Architecture for Window-Based Image Processing
Image processing requires more computational power and data throughput than most conventional processors can provide. Designing specific hardware can improve execution time and achieve better performance per unit of silicon area. A fieldprogrammable-gate-array(FPGA-) based configurable systolic architecture specially tailored for real-time window-based image operations is presented in this pape...
متن کاملA synthetic document image dataset for developing and evaluating historical document processing methods
Document images accompanied by OCR output text and ground truth transcriptions are useful for developing and evaluating document recognition and processing methods, especially for historical document images. Additionally, research into improving the performance of such methods often requires further annotation of training and test data (e.g., topical document labels). However, transcribing and ...
متن کاملAn ARM Based Hardware Architecture for Image Processing
Image processing and Object detection applications are often associated with real-time performance constraints that stem from the embedded environment that they are often deployed in. The aim of the project is to design and develop a hardware implementation using advanced features of ARM 9 architecture. The proposed embedded system uses ARM 32 bit RISC CPU. It has features of image/object detec...
متن کاملA System for the Implementation of Image Processing Algorithms on Configurable Computing Hardware
ii ACKNOWLEDGEMENTS I would first like to thank my advisor, Dr. Don Bouldin, for his support and guidance in this project. Without him, this work could never have been completed. I would also like to thank Dr. Bouldin for introducing me to the idea of configurable computing, an area I find very interesting and in which I hope to pursue further research. I am finally thankful to Dr. Bouldin for ...
متن کاملA Novel Multiply-Accumulator Unit Bus Encoding Architecture for Image Processing Applications
In the CMOS circuit power dissipation is a major concern for VLSI functional units. With shrinking feature size, increased frequency and power dissipation on the data bus have become the most important factor compared to other parts of the functional units. One of the most important functional units in any processor is the Multiply-Accumulator unit (MAC). The current work focuses on the develop...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: International Journal of Parallel Programming
سال: 2021
ISSN: 0885-7458,1573-7640
DOI: 10.1007/s10766-020-00690-y